View UM2002U8_7730930.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

________________________________________________________________________ http://www.union - ic.com rev .0 4 feb .201 4 1 / 1 2 u m20 0 2 bidirectional v oltage l evel t ranslator for o pen - d rain and p ush - p ull a pplications um 20 02 s8 sop8 um2002 u 8 ts sop8 general description the um2002 is a bidirectional voltage level t ranslator operational from 1.0 v to 3.6 v (v ref(a) ) and 1.8v to 5.5 v (v ref(b) ), which allow s bidirectional voltage translations between 1.0v and 5v without the need for a direction pin in open - drain or push - pull applications. bit widths ranging from 1 - bit or 2 - bit are offered for level translation application with transmission spee ds < 33 mhz for an open - drain system with a 50 pf capacitance and a pull - up of 197 . the translator s provide excellent esd protection to lower voltage devices, and at the same time protect less esd - resistant devices. applications features ? spi, microw ire and i 2 c level translation ? low - voltage asic level translation ? smart card readers ? cell - phone c r a dles ? portable pos systems ? portable communication devices ? low - cost serial interfaces ? cell - phones ? gps ? telecommunications equipment ? consumer electronics ? househo ld appliances ? provides bidirectional voltage translation with no direction pin ? less than 1.5 ns maximum propagation delay ? allows voltage level translation between: 1 ) . 1.0 v v ref(a) and 1.8v, 2.5v, 3.3 v or 5v v ref(b) 2 ) . 1.2 v v ref(a) and 1.8v, 2.5v, 3.3 v or 5v v ref(b) 3 ) . 1.8 v v ref(a) and 3.3v or 5 v v ref(b) 4 ) . 2. 0 v v ref(a) and 5 v v ref(b) 5 ) . 3.3 v v ref(a) and 5 v v ref(b) ? low 3.5 on ? 5v tolerant i/o ports to support mixed - mode signal operation ? high - impedance an and bn pins for en = low ? lock - up free operation ? flow through pinout for ease of printed - circuit board trace routing ? esd protection exceeds : 4kv hbm per jesd22 - a114 200 v mm per jesd22 - a115 1000 v cdm per jesd22 - c101 ? packages offered: sop 8 , ts sop 8
________________________________________________________________________ http://www.union - ic.com rev .0 4 feb .201 4 2 / 1 2 u m20 0 2 pin configurations top view (top view) xx: week code um2002s8 sop8 (top view) xx: week code um2002 u 8 ts sop8 pin description pin number symbol function 1 gnd ground (0v) 2 vrefa low - voltage side reference supply voltage for an 3 ,4 a1,a 2 low - voltage side; connected to vrefa through a pull - u p resistor 5 ,6 b1,b2 high - voltage side; connected to vrefb through a pull - up resistor 7 vrefb high - voltage side reference supply voltage for bn 8 en switch enable input; connected to vrefb and pulled - up through a high resistor o rdering information pa rt number packaging type marking code s hipping qty um 20 02 s8 sop 8 um2002s8 2500pcs/13 inch tape & reel um2002 u 8 ts sop8 2002 u8 3000pcs/13inch tape & reel g n d v r e f a a 1 a 2 b 2 b 1 v r e f b e n 1 2 3 4 8 7 6 5 1 2 3 4 8 7 6 5 u m 2 0 0 2 s 8 x x 1 g n d v r e f a a 1 a 2 b 2 b 1 v r e f b e n 2 3 4 8 7 6 5 1 2 3 4 8 7 6 5 2 0 0 2 u 8 x x
________________________________________________________________________ http://www.union - ic.com rev .0 4 feb .201 4 3 / 1 2 u m20 0 2 absolute maximum ratings (note 1) over operating free - air temperature range (unless otherwise noted ) symbol parameter value unit v ref(a) reference voltage (a) - 0.5 to +6 v v ref(b) reference voltage (b) - 0.5 to +6 v v i input voltage - 0.5(note 2) to +6 v v i/o voltage on an input/output pin - 0.5(note 2) to +6 v i ch channel current (dc) +128 ma i ik in put clamp current v i stg storage temperature - 65 to +150 c note 1: stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. these are stress ratings only, and functional operation of the device a t these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. exposure to absolute - maximum - rated conditions for extended periods may affect device reliability. note 2: the input and input/output negative vo ltage ratings may be exceeded if the input and input/output clamp current ratings are observed. recommended operating conditions symbol parameter conditions min max unit v i/o voltage on an input/output pin an, bn 0 5.5 v v ref(a) (note 3 ) reference vol tage (a) vrefa 0 5.4 v v ref(b) (note 3 ) reference voltage (b) vrefb 0 5.5 v v i(en) input voltage on pin en 0 5.5 v i sw(pass) pass switch current 64 ma t amb ambient temperature operating in free - air - 40 +85 c note 3 : v ref(a) v ref(b) ? 1 v for best results in level shifting applications.
________________________________________________________________________ http://www.union - ic.com rev .0 4 feb .201 4 4 / 1 2 u m20 0 2 electrical characteristics t amb = ?40 c to +85 c, unless otherwise specified. symbol parameter conditions min typ (note 4 ) max unit v ik input clamping voltage i i = ?18 i(en) = 0 v - 1.2 v i ih high - level input current v i = 5v; v i(en) = 0 v 5 ua c i(en) input capacitance on pin en v i = 0v or 3 v 12 pf c io(off) off - state input/output capacitance an, bn; v o = 0v or 3 v ; v i(en) = 0 v 10 12 pf c io(on) on - state input/output capacitance an, bn; v o = 0v or 3 v ; v i(en) = 3 v 8 12.5 (note 5 ) pf r on on - state resistance (note 6 ) an, bn; v i = 0 v; i o = 64 ma; v i(en) = 4.5 v (note 7 ) 1 2.5 5.0 i = 2.4 v; i o = 15 ma; v i(en) = 4.5 v 4.5 7.5 note 4 : all typical values are at t amb = 25c. note 5 : not production tested, maximum value based on characterization data of typical parts. note 6 : measured by the voltage drop between the an an d bn terminals at the indicated current through the switch. on - state resistance is determined by the lowest voltage of the two terminals. note 7 : guaranteed by design.
________________________________________________________________________ http://www.union - ic.com rev .0 4 feb .201 4 5 / 1 2 u m20 0 2 switching characteristics (translating down) over recommended operating free - air tempe rature range(unless otherwise noted). values guaranteed by design. symbol parameter test conditions c l =50pf c l =30pf c l =15pf unit min max min max min max v i(en) = 3.3 v; v ih = 3.3v; v il = 0v; v m =1.15v( see figure 1 ). t plh low to high propagation delay from (input) bn to (output) an. 0 3 .5 0 2 .7 0 2 .2 ns t phl high to low propagation delay 0 3 .5 0 3 .0 0 2 .3 ns v i(en) =2.5v; v ih = 2.5 v; v il = 0 v; v m = 0.75 v ( see figure 1 ). t plh low to high propagation delay from (input) bn to (output) an. 0 3 .5 0 2 .7 0 2 .2 ns t phl high to low propagation delay 0 4 .0 0 3 .0 0 2 .3 ns switching characteristics (translating up ) over recommended operating free - air temperature range(unless otherwise noted). values guaranteed by design. symbol parameter test conditions c l = 50pf c l =30pf c l =15pf unit min max min max min max v i(en) = 3.3 v; v ih = 2.3 v; v il = 0 v; v tt = 3.3 v; v m = 1.15 v; r l = 300 plh low to high propagation delay from (input) an to (output) bn. 0 3 .35 0 2 .5 0 2 . 0 ns t phl high to low propag ation delay 0 4 .35 0 3 .25 0 2 .4 ns v i(en) =2.5v; v ih = 1.5 v; v il = 0 v; v tt = 2.5 v; v m = 0.75 v; r l = 300 ( plh low to high propagation delay from (input) an to (output) bn. 0 3 .35 0 2 .5 0 2 . 0 ns t phl high to low propagation delay 0 4 .5 0 3 .5 0 2 . 5 ns
________________________________________________________________________ http://www.union - ic.com rev .0 4 feb .201 4 6 / 1 2 u m20 0 2 applications information detail description the um2002 is a bidirectional voltage level t ranslator operational from 1.0v to 3.6v (v ref(a) ) and 1.8v to 5.5v (v ref(b) ), which allow s bidirectional voltage tran slations between 1.0v and 5v without the need for a direction pin in open - drain or push - pull applications. when the an or bn port is low, the clamp is in the on - state and a low resistance connection exists between the an and bn ports. the low on - state resi stance (r on ) of the switch allows connections to be made with minimal propagation delay. assuming the higher voltage is on the bn port when the bn port is high, the voltage on the an port is limited to the voltage set by v ref(a) . when the an port is high, the bn port is pulled to the drain pull - up supply voltage (v pu(d) ) by the pull - up resistors. this functionality allows a seamless translation between higher and lower voltages selected by the user without the need for directional control. when en is high, the translator switch is on, and the an i/o are connected to the bn i/o, respectively, allowing bidirectional data flow between ports. when en is low, the translator switch is off, and a high - impedance state exists between ports. the en input circuit is de signed to be supplied by v ref(b) . to ensure the high - impedance state during power - up or power - down, en must be low. all channels have the same electrical characteristics and there is minimal deviation from one output to another in voltage or propagation de lay. this is a benefit over discrete transistor voltage translation solutions, since the fabrication of the switch is symmetrical. c l s 2 ( o p e n ) s 1 r l v t t f r o m o u t p u t u n d e r t e s t i n p u t o u t p u t v m v i h v i l v o h v o l v m v m v m a . l o a d c i r c u i t b . t i m i n g d i a g r a m ; h i g h - i m p e d a n c e s c o p e p r o b e u s e d s 1 = t r a n s l a t i n g u p ; s 2 = t r a n s l a t i n g d o w n . c l i n c l u d e s p r o b e a n d j i g c a p a c i t a n c e . a l l i n p u t p u l s e s a r e s u p p l i e d b y g e n e r a t o r s h a v i n g t h e f o l l o w i n g c h a r a c t e r i s t i c s : p r r 1 0 m h z ; z o = 5 0 ; t r 5 n s ; t f 5 n s . t h e o u t p u t s a r e m e a s u r e d o n e a t a t i m e , w i t h o n e t r a n s i t i o n p e r m e a s u r e m e n t . f i g 1 . l o a d c i r c u i t f o r o u t p u t s
________________________________________________________________________ http://www.union - ic.com rev .0 4 feb .201 4 7 / 1 2 u m20 0 2 enable and disable v c c i / o i 2 c - b u s m a s t e r i / o g n d u m 2 0 0 2 2 3 4 1 5 6 7 8 s w s w g n d r p u r p u a 1 a 2 v r e f 1 v r e f ( 1 ) = 1 . 8 v ( 1 ) v c c i / o i 2 c - b u s d e v i c e i / o g n d e n v r e f 2 2 0 0 k r p u r p u b 1 b 2 v p u ( d ) = 3 . 3 v ( 1 ) ( 1 ) t h e a p p l i e d v o l t a g e s a t v r e f ( 1 ) a n d v p u ( d ) s h o u l d b e s u c h t h a t v b i a s ( r e f ) ( 2 ) i s a t l e a s t 1 v h i g h e r t h a n v r e f ( 1 ) f o r b e s t t r a n s l a t o r o p e r a t i o n . f i g 2 . t y p i c a l a p p l i c a t i o n c i r c u i t ( s w i t c h a l w a y s e n a b l e d ) v c c i / o i 2 c - b u s m a s t e r i / o g n d u m 2 0 0 2 2 3 4 1 5 6 7 8 s w s w g n d r p u r p u a 1 a 2 v r e f 1 v r e f ( 1 ) = 1 . 8 v ( 1 ) v c c i / o i 2 c - b u s d e v i c e i / o g n d e n v r e f 2 2 0 0 k r p u r p u b 1 b 2 v p u ( d ) = 3 . 3 v ( 1 ) ( 1 ) i n t h e e n a b l e d m o d e , t h e a p p l i e d e n a b l e v o l t a g e v i ( e n ) a n d t h e a p p l i e d v o l t a g e a t v r e f ( 1 ) s h o u l d b e s u c h t h a t v b i a s ( r e f ) ( 2 ) i s a t l e a s t 1 v h i g h e r t h a n v r e f ( 1 ) f o r b e s t t r a n s l a t o r o p e r a t i o n . f i g 3 . t y p i c a l a p p l i c a t i o n c i r c u i t ( s w i t c h e n a b l e c o n t r o l ) o n o f f 3 . 3 v e n a b l e s i g n a l ( 1 )
________________________________________________________________________ http://www.union - ic.com rev .0 4 feb .201 4 8 / 1 2 u m20 0 2 bidirectional translation for the bidirectional clamping configuration (higher voltage to lower voltage or lower voltage to higher voltage), the en input must be connected to vrefb and both pins pulled to high side v pu(d) through a pull - up resistor (typic ally 200 k). this allows vrefb to regulate the en input. a filter capacitor on vrefb is recommended. the master output driver can be totem pole or open - drain (pull - up resistors may be required) and the slave device output can be totem pole or open - drain (p ull - up resistors are required to pull the bn outputs to v pu(d) ). however, if either output is totem pole, data must be unidirectional or the outputs must be 3 - stateable and be controlled by some direction - control mechanism to prevent high - to - low contention s in either direction. if both outputs are open - drain, no direction control is needed. the reference supply voltage (v ref(a) ) is connected to the processor core power supply voltage. when vrefb is connected through a 200 k resistor to a 3.3v to 5.5 v v pu(d) power supply, and v ref(a) is set between 1.0 v and (v pu(d) ? 1 v), the output of each an has a maximum output voltage equal to vrefa, and the output of each bn has a maximum output voltage equal to v pu(d) . u m 2 0 x x s w s w g n d a 1 a 2 v r e f a e n v r e f b 2 0 0 k b 1 b 2 f i g 4 . b i d i r e c t i o n a l t r a n s l a t i o n t o m u l t i p l e h i g h e r v o l t a g e l e v e l s v c o r e c p u i / o 1 . 8 v 1 . 5 v 1 . 2 v 1 . 0 v s w a 3 b 3 s w a 4 b 4 c h i p s e t i / o v c c 5 v c h i p s e t i / o v c c 3 . 3 v t o t e m p o l e o r o p e n - d r a i n i / o s w a 5 b 5 s w a 6 b 6 . . . s w a n b n
________________________________________________________________________ http://www.union - ic.com rev .0 4 feb .201 4 9 / 1 2 u m20 0 2 application ope rating conditions refer to figure 4 symbol parameter conditions min typ (note 8 ) max unit v ref(b) reference bias voltage (b) v ref(a) + 0.6 2.1 5 v v i(en) input voltage on pin en v ref(a) + 0.6 2.1 5 v v ref(a) reference voltage (a) 0 1.5 4.4 v i sw(pa ss) pass switch current 14 ma i ref reference current transistor 5 a amb ambient temperature operating in free - air - 40 +85 c note 8 : all typical values are at t amb = 25 c. sizin g pull - up resistor the pull - up resistor value needs to limit the current through the pass transistor when it is in the on state to about 15 ma. thi s ensures a pass voltage of 260mv to 350 mv. if the current through the pa ss transistor is higher than 15 ma, the pass voltage also is higher in the on state. to set the current thr ough each pass transistor at 15 ma, the pull - up resistor value is cal culated as: the table below summarizes resistor reference voltage s and currents at 15ma, 10 ma, and 3 ma. the resistor values shown in the +10 % column or a larger value should be used to ensure that the pass voltage of the transistor would be 350 mv or less. the external driver must be able to sink the total current from the resistors on both sides of the um2002 device at 0.175 v, although the 15ma only applies to current flowing through the um2002 device . pull - up resistor values calc ulated for v ol = 0.35 v; assumes output driver v ol = 0.175 v at stated current. v pu(d) pull - up resistor value ( ) 15ma 10ma 3ma nominal +10 % (note 9 ) nominal +10 % (note 9 ) nominal +10 % (note 9 ) 5v 310 341 465 512 1550 1705 3.3v 197 217 295 325 983 1082 2.5v 143 158 215 237 717 788 1.8v 97 106 145 160 483 532 1.5v 77 85 115 127 383 422 1.2v 57 63 85 94 283 312 note 9 : +10 % to compensate for v cc range and resistor tolerance. a v v r d pu pu 015 . 0 35 . 0 ) ( ? ?
________________________________________________________________________ http://www.union - ic.com rev .0 4 feb .201 4 10 / 1 2 u m20 0 2 package information um2 002s8 sop 8 outline drawing dimensions symbol millimeters inches min max min max a 1.350 1.750 0.053 0.069 a1 0.100 0 .250 0.004 0.010 a2 1.350 1.550 0.053 0.061 b 0.33 0.51 0.013 0.020 c 0.170 0.250 0.006 0.010 d 4.700 5.100 0.185 0.200 e 3.800 4.000 0.150 0.157 e1 5.800 6.200 0.228 0.244 e 1.270 (bsc) 0.050 (bsc) l 0.400 1.270 0.016 0.050 0 8 0 8 land pattern notes: 1. compound dimension: 4.90 3.90 2. unit: mm; 3. general tolerance 0.0 5 mm unless otherwise specified; 4. the layout is just for reference. tape and reel orientation d e 1 e e 1 2 t o p v i e w l c e n d v i e w a 2 b a 1 a s i d e v i e w 4 . 9 5 1 . 3 0 1 . 2 7 0 . 5 0 u m 2 0 0 2 s 8 x x
________________________________________________________________________ http://www.union - ic.com rev .0 4 feb .201 4 11 / 1 2 u m20 0 2 u m2002 u 8 : ts sop8 outline drawing dimensions symbol millimeters inches min max min max a - 1.200 - 0.048 a1 0.050 0.150 0.002 0.006 a2 0.900 1.050 0.036 0.042 a3 0.340 0.540 0.014 0.022 b 0.200 0.280 0.008 0.01 1 c 0.100 0.190 0.004 0.008 d 2.830 3.030 0.113 0.121 e 6.200 6.600 0.248 0.264 e1 4.300 4.500 0.172 0.180 e 0.650bsc 0.026bsc l 0.450 0.750 0.018 0.030 l1 1.000ref 0.040ref l2 0.250bsc 0.010bsc 1 0 8 0 8 2 10 14 10 14 3 10 14 10 1 4 land pattern notes: 1. compound dimension: 2.93 4.4 0; 2. unit: mm; 3. general tolerance 0.05mm unless otherwise specified; 4. the layout is just for reference. tape and reel orientation d e i n d e x 1 0 . 6 0 . 0 5 0 . 0 5 0 . 0 5 d e p e b e 1 0 . 1 0 a 3 a 2 a a 1 2 l l 1 l 2 0 . 6 5 5 . 7 5 1 . 4 0 0 . 3 5 2 0 0 2 u 8 x x
________________________________________________________________________ http://www.union - ic.com rev .0 4 feb .201 4 12 / 1 2 u m20 0 2 important notice the information in this document has been carefully reviewed and is believed to be accurate. nonetheless, this document is subject to change without notice. union assumes no responsibility for any inaccuracies that may be cont ained in this document, and makes no commitment to update or to keep current the contained information, or to notify a person or organization of any update. union reserves the right to make changes, at any time, in order to improve reliability, function or design and to attempt to supply the best product possible. union semiconductor, inc add : 2 f, no. 3 , lane 647 songtao road, shanghai 201203 tel: 021 - 5109 3966 fax: 021 - 51026018 website: www.union - ic.com

▲Up To Search▲

Price & Availability of UM2002U8

	To Download UM2002U8 Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .